Research / development / electronics design

Smart display controller AND HMI

Easily add appealing user interfaces to your single-purpose machines

This board, soon to be released as open source, is a controller for medium to large-sized displays. It's designed to be embedded on products that requires a high-resolution user interface (at least 1366x768) with full 24-bit color. Image composition is controlled by custom software that you can write and upload —similar to an Arduino™ sketch— using assets like images and fonts stored on a removable microSD card.

The output supports HDMI-compatible monitors, bare laptop displays, analog VGA monitors, and other common interfaces via adapter boards.

Interactivity is enabled through a USB mouse/keyboard or a touchscreen.

USAGE SCENARIOS

Integrate into any new product such as kiosks and vending machines
Signage in airports, queue management for shops and banks
Dashboards of vehicles and industrial machines
3D printers, treadmills, household appliances
Interactive art installations

MAIN ADVANTAGES

Supports many types of displays via adapter boards: HDMI-compatible digital video, laptopflat-cable laptop displays, and analog VGA
Direct connection to a laptop replacement display provides cost savings since HDMI monitors are more expensive.
Fast development with a simple Arduino-like API (vector and bitmap drawing primitives)
Mass storage for graphical assets like fonts, images, custom application data (video playback is under development)
Mouse/keyboard input through the USB host port, touchscreen support is under development.

CURRENT STATUS

There are two versions of the board, a FPGA-based model that offers full flexibility, and a 1GHz-CPU based board for a lower cost option. The FPGA version allows the development of custom hardware accelerators written in a subset of C, that are automatically translated to a logic circuit by the transpiler tool (generating Verilog code).

This project reflects over two years of dedicated development as a primary focus.

ExampleS AND DEMO projects

hOW TO USE

The OSHW logo demo (shown below) includes an algorithm that generates a gear animation in vector form, a font file for text, and a background image—all stored on an SD card. The API resembles the widely known processing.org API, with other API options under development.

Click on the images for details (WIP)

User interfaceS

Includes buttons, labels at different sizes, images, and other interactive widgets

Animated Logo

A spinning OSHW logo gear using vector drawing primitives (lines and arcs) with anti-aliased edges and alpha blending for a shadow effect

GENERATIVE ART

A fractal tree image created with lines, combined with other elements like shapes and text

GAMES

Retro-style car game animation using simple rectangle drawing

Scalable FONTS

Basic 3D effect achieved by drawing the same font glyph with anti-aliased edges at different scales

MICROPYTHON

Example of drawing simple shapes using MicroPython running directly on the board

VIDEO PLAYBACK*

Plays videos from the SD card using a custom video codec accelerator

*Currently supported only on a standard FPGA development board. A custom version is in development using an FPGA from the same family

SPECIFICATIONS

Resolution: Up to HD (1366x768) on the FPGA model. Up to Full HD (1920x1080) on the CPU model and a planned FPGA model.
Display size: Large displays of any size that matches the resolution capability.
Color resolution: 24-bit True Color, with alpha channel support (32-bit color) for transparency effects.
Internal storage: SD card socket.
Video output options: standard TFT/LCD displays (laptop replacements using LVDS protocol, eDP planned). Standard TVs and PC monitors (HDMI-compatible which support DVI protocol). Analog VGA.
Language support: C++ based sketches (like in Arduino). Basic MicroPython support (to be expanded).
USB connectivity: Host and device ports (USB 1.0, compatible with mice and keyboards).
RAM: 64MB, 128MB or 256 MB DDR (depends on board model).
Dimensions: 50x26mm.

This project is partially funded through the NGI0 Core Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 101092990.

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